Theses and Dissertations

Comparative Analysis of Digital Logic Component Hiding Techniques

Date of Award

12-2021

Document Type

Thesis

Degree Name

M.S.

Department

Computer and Information Science

Committee Chair

J. Todd McDonald, Ph.D.

Abstract

Intellectual property protection is important in the world of software and hardware security. For hardware artifacts, gate level recovery of an underlying physical artifact is the prerequisite step for design recovery. A key task of a malicious reverse engineer analyzing a gate-level schematic is to identify component building blocks in an effort to reconstruct sub-circuit design constructs. Preventing component identification serves to deter such adversaries from their targeted goal. One method to prevent component identification is to use semantic preserving transformations, otherwise known as obfuscation, which has the goal to increase effort and time to reverse engineer. This thesis focuses on component identification and obfuscation tools. We conduct a case study analysis on several candidate component hiding algorithms and also use an extended set of component identification algorithms to compare obfuscation effectiveness. Our study examines the baseline performance of component identification tools to establish the number and types of components as well as time for reverse engineering an unaltered circuit. To prevent component identification techniques, we utilize the obfuscation tools for hiding the components on the circuit. Our study illustrates comparative analysis of seven different identification algorithms versus four different hiding approaches.

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